High Speed Clock Data Recovery Module

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- High Speed Clock Data Recovery Module
- Study on Optical communication Issue Z1, (1994)
- 作者机构：
  
  邮电部激光通信研究所
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN929.1
- Published：1994，
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[1]杨壮.通用高速时钟数据恢复模块[J].光通信研究,1994(Z1):68-70+75.

Yang Zhuang. High Speed Clock Data Recovery Module. [J]. (Z1).(1994)
[1]杨壮.通用高速时钟数据恢复模块[J].光通信研究,1994(Z1):68-70+75. DOI：

Yang Zhuang. High Speed Clock Data Recovery Module. [J]. (Z1).(1994) DOI：

本文介绍采用专用大规模集成电路制作的时钟数据恢复模块，文中阐述了工作原理及性能。该模块可通用于５５０～６５０Ｍｂｉｔ／ｓ工作速率，已在京－沪－广光通信系统工程设备中应用。该模块具有同时输出两路时钟、数据信号及控制输出时钟关断功能，单电源供电，功耗约２Ｗ。

This paper described the principle and performance of an ASIC - based clock data recovery module working at the rate of 550～650Mbit/s

which was deployed on Beijing-Shanghai-Guangzhou optical communication project

with the functions of simultaneous two clock and data outputs

and the output clock switch-off

single power source with the power consumption of 2W.

专用大规模集成电路时钟数据模块

ASICclock datamodule

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State Key Laboratory of Optical Communication Technologies and Networks

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Wuhan National Laboratory for Optoelectronics,HuaZhong University of Science & Technology

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华中科技大学武汉国家光电实验室光纤通信技术和网络国家重点实验室烽火通信科技股份有限公司光纤研发部

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