This paper introduces some methods applied in SDH. They include parallel frame aligner and parallel scrambler that can realize the functions that must be realized in high speed circuits before in low speed circuits

so that the circuit’s stability is increased and the power dissipation is reduced. And the paper also introduces a digitalization pretreatment method that can smooth the 24 bit jitter caused by AU4 pointer adjustment. In addition

the paper introduces STM1 multiplexing application specific integrated circuit TSOH99001 that uses those methods

and presents the chip’s scheme.