Clock Recovery and Decision Circuit of Optical Line Terminal Unit and Repeater

Chen Jingxian

doi:10.13756/j.gtxyj.1989.04.004

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Clock Recovery and Decision Circuit of Optical Line Terminal Unit and Repeater

- Clock Recovery and Decision Circuit of Optical Line Terminal Unit and Repeater
- Study on Optical communication Issue 4, Pages: 14-21(1989)
- 作者机构：
  
  激光通信研究所
- 作者简介：
- 基金信息：
- DOI：10.13756/j.gtxyj.1989.04.004
  CLC：
- Published：1989，
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[1]陈竞先.光端机、中继器的时钟提取和识别判决电路[J].光通信研究,1989(04):14-21+38.

Chen Jingxian. Clock Recovery and Decision Circuit of Optical Line Terminal Unit and Repeater. [J]. (4):14-21(1989)
[1]陈竞先.光端机、中继器的时钟提取和识别判决电路[J].光通信研究,1989(04):14-21+38. DOI： 10.13756/j.gtxyj.1989.04.004.

Chen Jingxian. Clock Recovery and Decision Circuit of Optical Line Terminal Unit and Repeater. [J]. (4):14-21(1989) DOI： 10.13756/j.gtxyj.1989.04.004.

摘要

本文分析了光纤数字系统中定时提取和识别判决电路的组成

给出选择和设计电路的依椐。并例举34Mb/s光端机和中继器中使用的具体电路。

Abstract

This article analyzes clock recovery and decision circuit used in digital communication systems on optical fiber cables.The resort to select and design these circuit is given. The example of the practical circuit used in optical line terminal unit and repeater at 34 Mb/s is also given.

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