This paper presents an usual design for STM鈥? frame Alignment as per CCITT proposals. An improved design scheme for the STM鈥? frame alignment by using error tolerance technique is analysed. Some practical technologies

such as using of one bit or two bits as error tolerance

possibility of using different lengths of frame alignment codes in the in-frame and out-of-frame status

and the optimum code pattern for frame alignment are also analysed.Finally

an optimum design scheme for the STM—4 frame alignment without much more additional physical difficulties

is proposed

the performance is much better than the specifications of CCITT recommendations.