Burst mode synchronization is a key technology in passive optical network that utilizes TDMA （Time Division Multi Address） with single mode fiber. For the clock recovery in burst mode transmission

a burst mode synchronizer using keyword detection based on multi phase clock is usually used. In this article

a novel high speed burst mode synchronizer based on data delay is presented. Because the same master clock is used in sampling circuit

phase alignment isn’t needed

and the circuit design can be simplified. This synchronizer is implemented by FPGA and ECL active tapped delay line

which can achieve high performance （155 Mbit/s） with low cost

short developing period

and easy migration.