5 GHz 0.18 μm CMOS quadrature output VCO

CHEN Ying-mei; WANG Zhi-gong; ZHU En; FENG Jun; ZHANG Li

doi:10.13756/j.gtxyj.2004.02.012

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5 GHz 0.18 μm CMOS quadrature output VCO

- 5 GHz 0.18 μm CMOS quadrature output VCO
- Study on Optical communication Issue 2, Pages: 39-41(2004)
- 作者机构：
  
  1. 东南大学射频与光电集成电路研究所
  2. 东南大学射频与光电集成电路研究所江苏南京　210096
- 作者简介：
- 基金信息：
- DOI：10.13756/j.gtxyj.2004.02.012
  CLC： TN752
- Published：2004，
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[1]陈莹梅,王志功,朱恩,冯军,章丽.5GHz0.18μm CMOS工艺正交输出VCO[J].光通信研究,2004(02):39-41.

CHEN Ying-mei, WANG Zhi-gong, ZHU En, et al. 5 GHz 0.18 μm CMOS quadrature output VCO. [J]. (2):39-41(2004)
[1]陈莹梅,王志功,朱恩,冯军,章丽.5GHz0.18μm CMOS工艺正交输出VCO[J].光通信研究,2004(02):39-41. DOI： 10.13756/j.gtxyj.2004.02.012.

CHEN Ying-mei, WANG Zhi-gong, ZHU En, et al. 5 GHz 0.18 μm CMOS quadrature output VCO. [J]. (2):39-41(2004) DOI： 10.13756/j.gtxyj.2004.02.012.

摘要

文章采用全开关状态的延时单元和双延时路径两种电路技术设计了一种高工作频率、低相位噪声的环形振荡器.环路级数采用偶数级来获得两路相位相差90℃的正交输出时钟.采用TSMC0.18μmCMOS工艺进行流片

电压控制振荡器（VCO）的频率范围为4.9～5.5GHz

模拟的相位噪声为-119.3dBc/Hz@5M

采用1.8V电源电压

核芯电路的功耗为30mW

振荡器核芯面积为60μm×60μm.

Abstract

This paper presents two circuit techniques of full switching delay cells and dual-delay path to design a high operate frequency

low noise ring oscillator. An even-stage ring oscillator is adopted to generated two quadrature output clock of 90 degrees phase differences. The chip is fabricated in 0.18 μm CMOS process

VCO operates at 4.9 GHz to 5.5 GHz

the simulated phase noise is -119.3 dBc/Hz at 5 MHz offset. With the 1.8 V-power supply

the core circuit power is 30 mW

the chip core area is 60 μm×（60 μm.）

关键词

电压控制振荡器CMOS振荡器环形振荡器相位噪声

Keywords

VCOCMOS oscillatorring oscillatorphase noise

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Guodian Nanjing Automation Co.,Ltd.

Department of Electrical and Computer Engineering,National University of Singapore

National Defense Key Laboratory of Air to Ground Laser Communication,Changchun University of Science and Technology

State Key Lab of ASIC and System,Department of Communication Science and Engineering, Fudan University

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