MBOK modulation is introduced in the UWB baseband system
for which no substantial bandwidth increase is necessary when the data transmission rate is to be boosted.In order to improve the data transmission reliability
a block interleaver is added before the data coding.What is unique to this design is that two pieces of RAM registers are employed for alternative reading and writing so as to minimize the time delay of the interleaver.Besides
programming is implemented with VHDL and simulations performed on FPGA with QUARTUS II.The result shows that when the interleaver is added to the MBOK system
burst errors are interleaved for easier error corrections of the system.