This paper gives a detailed description of the traffic data calculation procedure from the FPGA perspective.The main approach is to convert the source and destination addresses to mapped ones.Then the traffic data information is marked by a matrix.Finally
the statistical information of the local nodes is stored.Simulations indicate that the FPGA implementation approach for Resilient-Packet-Ring(RPR)-based traffic flow statistics proposed in this paper is an efficient way to compute the traffic flow through the downstream blocking and non-blocking nodes.It is of great significance in project applications.